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LPC47M10x 100 Pin Enhanced Super I/O Controller with LPC Interface for Consumer Applications
PRODUCT FEATURES

Data Brief
3.3 Volt Operation (5 Volt Tolerant) LPC Interface ACPI 1.0 Compliant Fan Control
-- Fan Speed Control Outputs -- Fan Tachometer Inputs
Keyboard Controller
-- -- -- -- -- -- -- -- -- -- 8042 Software Compatible 8 Bit Microcomputer 2k Bytes of Program ROM 256 Bytes of Data RAM Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface Asynchronous Access to Two Data Registers and One Status Register Supports Interrupt and Polling Access 8 Bit Counter Timer Port 92 Support Fast Gate A20 and KRESET Outputs

Programmable Wake-up Event Interface PC98, PC99 Compliant Dual Game Port Interface MPU-401 MIDI Support General Purpose Input/Output Pins ISA Plug-and-Play Compatible Register Set Intelligent Auto Power Management System Management Interrupt 2.88MB Super I/O Floppy Disk Controller
-- Licensed CMOS 765B Floppy Disk Controller -- Software and Register Compatible with SMSC's Proprietary 82077AA Compatible Core -- Supports Two Floppy Drives Directly -- Configurable Open Drain/Push-Pull Output Drivers -- Supports Vertical Recording Format -- 16-Byte Data FIFO -- 100% IBM Compatibility -- Detects All Overrun and Underrun Conditions -- Sophisticated Power Control Circuitry (PCC) Including Multiple Powerdown Modes for Reduced Power Consumption -- DMA Enable Logic -- Data Rate and Drive Control Registers -- 480 Address, Up to Eight IRQ and Three DMA Options
Serial Ports
-- Two Full Function Serial Ports -- High Speed NS16C550A Compatible UARTs with Send/Receive 16-Byte FIFOs -- Supports 230k and 460k Baud -- Programmable Baud Rate Generator -- Modem Control Circuitry -- 480 Address and 15 IRQ Options
Infrared Port
-- -- -- -- Multiprotocol Infrared Interface IrDA 1.0 Compliant SHARP ASK IR 480 Addresses, Up to 15 IRQ
Multi-Mode Parallel Port with ChiProtect
-- Standard Mode IBM PC/XT(R), PC/AT, and PS/2 Compatible Bidirectional Parallel Port -- Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) -- IEEE 1284 Compliant Enhanced Capabilities Port (ECP) -- ChiProtect Circuitry for Protection -- 960 Address, Up to 15 IRQ and Three DMA Options
Enhanced Digital Data Separator
-- 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates -- Programmable Precompensation Modes
LPC Interface
-- Multiplexed Command, Address and Data Bus -- Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems -- PME Interface
100 Pin QFP package, green, lead-free packages also available
SMSC LPC47M10x
PRODUCT PREVIEW
Revision 1.0 (05-13-05)
100 Pin Enhanced Super I/O Controller with LPC Interface for Consumer Applications
ORDER NUMBER(S): LPC47M102S-MC FOR AMI BIOS IN 100 PIN QFP PACKAGE (LEADED) LPC47M102S-MS FOR AMI BIOS IN 100 PIN QFP PACKAGE (GREEN, LEAD-FREE) LPC47M107S-MC FOR PHOENIX BIOS IN 100 PIN QFP PACKAGE (LEADED) LPC47M107S-MS FOR PHOENIX BIOS IN 100 PIN QFP PACKAGE (GREEN, LEAD-FREE)
80 Arkay Drive Hauppauge, NY 11788 (631) 435-6000 FAX (631) 273-3123
Copyright (c) SMSC 2005. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC's website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation ("SMSC"). Product names and company names are the trademarks of their respective holders. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.0 (05-13-05)
PRODUCT PREVIEW
2
SMSC LPC47M10x
100 Pin Enhanced Super I/O Controller with LPC Interface for Consumer Applications
General Description
The LPC47M10x* is a 3.3V (5V tolerant) PC98/PC99 compliant Super I/O controller. The LPC47M10x implements the LPC interface, a pin reduced ISA bus interface which provides the same or better performance as the ISA/X-bus with a substantial savings in pins used. The LPC47M10x provides fan control through two fan speed control output pins and two fan tachometer input pins. It also provides 37 general purpose input/output (GPIO) pins, a dual game port interface and MPU-401 MIDI support. The LPC47M10x incorporates a keyboard interface, SMSC's true CMOS 765B floppy disk controller, advanced digital data separator, two 16C550A compatible UARTs, one Multi-Mode parallel port which includes ChiProtect circuitry plus EPP and ECP, on-chip 12 mA AT bus drivers, one floppy direct drive support, and Intelligent Power Management including PME support. The true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC/AT architectures in addition to providing data overflow and underflow protection. The SMSC advanced digital data separator incorporates SMSC's patented data separator technology, allowing for ease of testing and use. Both on-chip UARTs are compatible with the NS16C550A. The parallel port is compatible with IBM PC/AT architecture, as well as IEEE 1284 EPP and ECP. The LPC47M10x incorporates sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake-up events. The PCC supports multiple low power-down modes. The LPC47M10x supports the ISA Plug-and-Play Standard register set (Version 1.0a) and provides the recommended functionality to support Windows '95. The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47M10x may be reprogrammed through the internal configuration registers. There are 480 (960 for Parallel Port) I/O address location options, a Serialized IRQ interface, and three DMA channels. The LPC47M10x does not require any external filter components and is therefore easy to use and offers lower system costs and reduced board area. The LPC47M10x is software and register compatible with SMSC's proprietary 82077AA core.
*The "x" in the part number is a designator that changes depending upon the particular BIOS used inside the specific chip. "2" denotes AMI Keyboard BIOS and "7" denotes Phoenix 42i Keyboard BIOS.
SMSC LPC47M10x
PRODUCT PREVIEW
3
Revision 1.0 (05-13-05)
100 Pin Enhanced Super I/O Controller with LPC Interface for Consumer Applications
Block Diagram
nIO_SMI nIO_PME SMI PME
Game Port Signals* (1-Dual)
...
FAN_TACH1* FAN1* FAN2* FAN_TACH2*
Game Port
Fan Control
MULTI-MODE PARALLEL PORT MUX PD0-7 BUSY, SLCT, PE, nERROR, nACK nSTB, nSLCTIN, nINIT, nALF GP1[0:7]* GP2[0:2,4:7]* GP3[0:7]*, GP4[0:3]* GP5[0:7]*, GP6[0:1]* TXD1, nCTS1, nRTS1 RXD1 nDSR1, nDCD1, nRI1, nDTR1
DATA BUS SER_IRQ PCI_CLK SERIAL IRQ ADDRESS BUS
GENERAL PURPOSE I/O
ACPI BLOCK
CONFIGURATION REGISTERS
LPC Bus Signals
16C550 COMPATIBLE SERIAL PORT 1
LPC BUS INTERFACE
CONTROL BUS 16C550 COMPATIBLE SERIAL PORT 2 WITH INFRARED IRRX2, IRTX2 TXD2(IRTX), nCTS2, nRTS2* RXD2(IRRX)
*
WDATA WCLOCK SMSC PROPRIETARY 82077 COMPATIBLE VERTICAL FLOPPYDISK CONTROLLER CORE DIGITAL DATA SEPARATOR WITH WRITE PRECOMPENSATION RCLOCK RDATA CLOCK GEN nINDEX DENSEL nDS0 nTRK0 nDIR nMTR0 nDSKCHG nSTEP DRVDEN0 nWDATA nRDATA nWRPRT * nHDSEL DRVDEN1 CLK32 CLOCKI nWGATE 32KHz 14MHz
nDSR2, nDCD2, nRI2, nDTR2*
MPU-401 SERIAL PORT
MIDI_IN MIDI_OUT
8042
KCLK KDATA MCLK MDATA GATEA20, KRESET
VTR Vcc Vss
* Denotes Multifunction Pins
Figure 1 LPC47M10x Block Diagram
Revision 1.0 (05-13-05)
PRODUCT PREVIEW
4
SMSC LPC47M10x
100 Pin Enhanced Super I/O Controller with LPC Interface for Consumer Applications
Package Outline
Figure 2 LPC47M10x 100 Pin QFP and 100 Pin QFP (Lead-Free) Package Outline Table 1 LPC47M10x 100 Pin QFP and 100 Pin QFP (Lead-Free) Package Parameters MIN A A1 A2 D D/2 D1 E E/2 E1 H L L1 e q W R1 R2 ccc ccc ~ 0.05 2.57 23.65 11.825 19.90 17.65 8.825 13.90 0.11 0.73 ~ 0o 0.20 0.10 0.15 ~ ~ NOMINAL ~ ~ ~ ~ 11.95 ~ ~ 8.95 ~ ~ 0.88 1.95 0.65 Basic ~ ~ ~ ~ ~ ~ MAX 3.4 0.5 2.87 24.15 12.075 20.10 18.15 9.075 14.10 0.23 1.03 ~ 7o 0.40 0.25 0.40 0.09 0.10 REMARKS Overall Package Height Standoff Body Thickness X Span 1/ X Span Measured from Centerline 2 X body Size Y Span 1/ Y Span Measured from Centerline 2 Y body Size Lead Frame Thickness Lead Foot Length Lead Length Lead Pitch Lead Foot Angle Lead Width Lead Shoulder Radius Lead Foot Radius Coplanarity (Assemblers) Coplanarity (Test House)
Notes: 1. Controlling Unit: millimeter 2. Tolerance on the position of the leads is 0.065 mm maximum 3. Package body dimensions D1 and E1 do not include the mold protrusion. Maximum mold protrusion is 0.25 mm. 4. Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane. 5. Details of pin 1 identifier are optional but must be located within the zone indicated
SMSC LPC47M10x
PRODUCT PREVIEW
5
Revision 1.0 (05-13-05)

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